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% DOI
\acmDOI{10.475/123_4}

% ISBN
\acmISBN{123-4567-24-567/08/06}

%Conference
\acmConference[FPGA'19]{ACM/SIGDA International Symposium on FieldProgrammable Gate Arrays}{February 24-26, 2019}{Seaside,California,USA}
\acmYear{2019}
\copyrightyear{2019}


\acmArticle{4}
\acmPrice{15.00}

\begin{document}
\title{Improving the Zynq-based DNN developer's ecosystem by integrating all necessary factors into a PYNQ-compliant online platform}
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%\subtitle{Extended Abstract}
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\author{Chen Chen}
%\orcid{1234-5678-9012}
\affiliation{%
  \institution{School of IoT Engineering, Jiangnan University }
  \city{Wuxi}
  \country{China}
}
\email{6161910018@vip.jiangnan.edu.cn}

\author{Jun Xia}
\affiliation{%
  \institution{School of IoT Engineering, Jiangnan University }
  \city{Wuxi}
  \country{China}
}
\email{6161914036@vip.jiangnan.edu.cn}

\author{Wenmin Yang}
\affiliation{%
  \institution{OpenHEC Lab}
  \city{Wuxi}
  \country{China}}
\email{ouyang.wm@openhec.com}

\author{Kang Li}
\affiliation{%
  \institution{School of IoT Engineering, Jiangnan University}
  \city{Wuxi}
  \country{China}}
\email{6171966018@vip.jiangnan.edu.cn}

\author{Zhilei Chai}
\affiliation{%
  \institution{School of IoT Engineering, Jiangnan University \\Engineering Research Center of IoT Applications Ministry of Education }
  \city{Wuxi}
  \country{China}
}
\email{zlchai@jiangnan.edu.cn}


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\begin{abstract}
The Zynq heterogeneous SoC from Xilinx is able to supporting software/hardware co-designing in one single chip, making it possible to take advantage of software flexibility and hardware acceleration at the same time. PYNQ project from Xilinx is trying to take advantage of high performance and low power consumption of Zynq while improve its programmability. In order to improve the ecosystem of PYNQ and help more embedded AI applications use the Zynq-based high-efficiency computational engine, this paper proposes a PYNQ-compliant online platform (OpenHEC-PYNQ) that integrates all necessary factors for the Zynq-based DNN developer. This platform makes HDL/HLS designers able to access all resources they needed via the Internet and finish all jobs one-stop. To show effectiveness of this platform, a YOLOv2 FPGA acceleration library is implmented based on OpenHEC-PYNQ. 
\end{abstract}

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